Muljorahardjo, Stefanus Andika and Arko, Arko and Rosendahl, Jonas (2016) Creating Hardware Abstraction Layer for Different National Instrument (NI) Based Hardware in CLAAS Test Sequencer (CTS) System Using LabVIEW Program. Bachelor thesis, Swiss German University.

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Abstract

CLAAS production area tests machine for functions and capability using CTS (CLAAS Test Sequencer). CTS consist of different modules which communicates with hardware. Since the increase of CTS user, engineer struggle to maintain the system, since each hardware configuration in every modules inside CTS need special works. To reduce effort, hardware abstraction layer is created to generalize the hardware connection. Hardware abstraction layer is created with queued state machine concept (QSM-PC) and simple TCP/IP messaging (STM) communication protocol between networks. Combination of both concept is used in the structure of Hardware Abstraction Layer. The structure separates between hardware handler and evaluation modules, with all hardware handler acts as the server, and evaluation modules acts as client. With the hardware handler general to every module, CTS is more maintainable.

Item Type:	Thesis (Bachelor)
Uncontrolled Keywords:	Hardware Abstraction Layer; TCP/IP; STM Reference Library; Server; Client.
Subjects:	Q Science > QA Mathematics > QA76 Computer software T Technology > T Technology (General) > T58.5 Information technology T Technology > TJ Mechanical engineering and machinery > TJ163.12 Mechatronics
Divisions:	Faculty of Engineering and Information Technology > Department of Mechatronics Engineering
Depositing User:	Atroridho Rizky
Date Deposited:	17 Nov 2020 13:48
Last Modified:	17 Nov 2020 13:48
URI:	http://repository.sgu.ac.id/id/eprint/1433

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